1. Field of the Invention
The present invention relates to a DC-DC converter and a control method thereof, and more particularly, to a DC-DC converter minimizes an unnecessary switching occurring when a light electric load is connected and which improves an efficiency of the DC-DC converter and a control method thereof.
2. Description of the Related Art
Generally, a DC-DC converter converts a DC power input from an external source to a predetermined DC power that an electric load requires. DC-DC converters may be classified into a boost type to raise a voltage of the input DC power and a buck type to drop the voltage of the input DC power.
Hereinbelow, a synchronous buck converter is taken as an example for a description.
As shown in FIG. 1, the synchronous buck converter comprises a pair of switches 300 and 302 which are alternately operable according to a pulse width modulation (PWM) signal output from a controller (not shown) and which supply/cut an input DC power VIN, an inductor 316 connected to a common node between the pair of switches 300 and 302 and a capacitor 318 connected between the inductor 316 and a ground potential.
According to the configuration described above, a description of an operation of the synchronous buck converter follows.
The synchronous buck converter is operated in two modes according to whether each of the switches 300 and 302 is turned on or off.
In a first mode, the switch 300 is turned on and the switch 302 is turned off. In the first mode, the DC power VIN is supplied to an input end of the inductor 316, so that an electric current flowing through the inductor 316 increases. Thus, energy is accumulated in the inductor 316 and the energy is supplied to an output end of the inductor 316, so that an output voltage VOUT across a capacitor 318 rises.
In a second mode, the switch 300 is turned off and the switch 302 is turned on, so that the inductor 316 and the capacitor 318 form a closed circuit. In the second mode, an electric current flowing through the inductor 316 flows continually through the closed circuit until the switch 300 is turned on in a next period of the PWM signal. Thus, an electric charge on the capacitor 318 decreases and the output voltage VOUT drops.
The controller (not shown) senses the output voltage VOUT output to the electric load 320. If the output voltage VOUT is low, the controller lengthens the turned-on time of the switch 300 and shortens the turned-on time of the switch 302 to raise the output voltage VOUT. If the output voltage VOUT is high, the controller shortens the turned-on time of the switch 300 and lengthens the turned-on time of the switch 302 to reduce the output voltage VOUT. That is, the controller adjusts a duty ratio of the PWM signal output to each of the switches 300 and 302 according to the output voltage VOUT to hold the voltage VOUT supplied to the electric load 320 at a constant value.
A delay circuit (not shown) which is operative after the inverter 314 provides a dead time between the switch 300 and the switch 302 to prevent a so-called arm short phenomenon in which an electric current is conducted from the input VIN directly to the ground potential as the switch 300 and the switch 302 are simultaneously turned on.
A central processing unit (CPU) of a mobile electronic device requires a relatively large current, thus in a CPU-voltage regulation module (CPU-VRM) a plurality of switches are connected in parallel to each of the switch 300 and the switch 302 shown in FIG. 1, to increase the current capacity.
As shown in FIG. 2, in a conventional CPU-VRM having the plurality of parallel switches, switches 341, 344 and 347 of a switch unit 340 are simultaneously turned on/off by a PWM signal output from a controller (not shown). Switches 351, 354 and 357 of a switch unit 350 are turned on/off alternately with the switches 341, 344 and 347. A dead time due to a delay circuit (not shown) after the inverter 360 is operative between the switch units 340 and 350 in a similar manner as described above with respect to the conventional circuit shown in FIG. 1.
However, in the conventional circuits described above, some of the switches connected in parallel are unnecessarily switched although a light electric load is connected, thereby causing a switching loss and decreasing the efficiency.